Adapt to removal of #ifdef ia64 in xmalloc (handle SMP_CACHE_SHIFT)
authordjm@kirby.fc.hp.com <djm@kirby.fc.hp.com>
Wed, 23 Nov 2005 21:23:28 +0000 (15:23 -0600)
committerdjm@kirby.fc.hp.com <djm@kirby.fc.hp.com>
Wed, 23 Nov 2005 21:23:28 +0000 (15:23 -0600)
xen/include/asm-ia64/linux-xen/asm/cache.h [new file with mode: 0644]
xen/include/asm-ia64/linux/asm/cache.h [deleted file]

diff --git a/xen/include/asm-ia64/linux-xen/asm/cache.h b/xen/include/asm-ia64/linux-xen/asm/cache.h
new file mode 100644 (file)
index 0000000..7d4cfd5
--- /dev/null
@@ -0,0 +1,35 @@
+#ifndef _ASM_IA64_CACHE_H
+#define _ASM_IA64_CACHE_H
+
+#include <linux/config.h>
+
+/*
+ * Copyright (C) 1998-2000 Hewlett-Packard Co
+ *     David Mosberger-Tang <davidm@hpl.hp.com>
+ */
+
+/* Bytes per L1 (data) cache line.  */
+#define L1_CACHE_SHIFT         CONFIG_IA64_L1_CACHE_SHIFT
+#define L1_CACHE_BYTES         (1 << L1_CACHE_SHIFT)
+
+#define L1_CACHE_SHIFT_MAX 7   /* largest L1 which this arch supports */
+
+#ifdef XEN
+# define SMP_CACHE_SHIFT       L1_CACHE_SHIFT
+# define SMP_CACHE_BYTES       L1_CACHE_BYTES
+#else
+#ifdef CONFIG_SMP
+# define SMP_CACHE_SHIFT       L1_CACHE_SHIFT
+# define SMP_CACHE_BYTES       L1_CACHE_BYTES
+#else
+  /*
+   * The "aligned" directive can only _increase_ alignment, so this is
+   * safe and provides an easy way to avoid wasting space on a
+   * uni-processor:
+   */
+# define SMP_CACHE_SHIFT       3
+# define SMP_CACHE_BYTES       (1 << 3)
+#endif
+#endif
+
+#endif /* _ASM_IA64_CACHE_H */
diff --git a/xen/include/asm-ia64/linux/asm/cache.h b/xen/include/asm-ia64/linux/asm/cache.h
deleted file mode 100644 (file)
index 666d8f1..0000000
+++ /dev/null
@@ -1,30 +0,0 @@
-#ifndef _ASM_IA64_CACHE_H
-#define _ASM_IA64_CACHE_H
-
-#include <linux/config.h>
-
-/*
- * Copyright (C) 1998-2000 Hewlett-Packard Co
- *     David Mosberger-Tang <davidm@hpl.hp.com>
- */
-
-/* Bytes per L1 (data) cache line.  */
-#define L1_CACHE_SHIFT         CONFIG_IA64_L1_CACHE_SHIFT
-#define L1_CACHE_BYTES         (1 << L1_CACHE_SHIFT)
-
-#define L1_CACHE_SHIFT_MAX 7   /* largest L1 which this arch supports */
-
-#ifdef CONFIG_SMP
-# define SMP_CACHE_SHIFT       L1_CACHE_SHIFT
-# define SMP_CACHE_BYTES       L1_CACHE_BYTES
-#else
-  /*
-   * The "aligned" directive can only _increase_ alignment, so this is
-   * safe and provides an easy way to avoid wasting space on a
-   * uni-processor:
-   */
-# define SMP_CACHE_SHIFT       3
-# define SMP_CACHE_BYTES       (1 << 3)
-#endif
-
-#endif /* _ASM_IA64_CACHE_H */